Nag Patibandla, Ph.D.VP, Advanced Deposition Products | Applied Materials
Nag Patibandla is the Vice President for Advanced Deposition Products in the Office of the CTO at Applied Materials, Inc. He manages a number of emerging technology and government/externally funded programs to develop new products, to validate innovation, to define product architecture, and to engage partners. Nag’s current areas of interest include: Micro-LED displays, III-Nitride devices, superconducting materials, optical films, 3D Printing, CMP pads, deposition processes (MOCVD, PVD), etc. His expertise is in identifying growth opportunities and developing strategic plans for product development in various emerging technologies and semiconductor-adjacent areas.
Nag joined Applied in 2008. Since, he has helped establish programs in various new technology areas and has established an infrastructure to secure and administer external/government funding for growth programs. Nag has over 25 years of experience in industry, academia, and government, with an extensive R&D background in solid state lighting, photovoltaics, batteries, fuel cells, high temperature superconductivity, and related technologies. Before joining Applied, Nag was the Director of Center of Future Energy Systems at Rensselaer Polytechnic in Troy, NY. Prior to that, he worked in New York State government and at the General Electric Global R&D Center.
Nag received his Ph.D. in Materials Science and Engineering from Rutgers University, NJ, having first completed his bachelor’s degree in Metallurgical Engineering at the National Institute of Technology (formerly Regional Engineering College) in India and his master’s degree in Mechanics and Materials Science from Rutgers. He has authored/co-authored over 300 publications and patent applications in various areas of materials engineering.
In recognition of his professional achievements, the Board of Governors and the Management of National Institute of Technology, Warangal, India bestowed Distinguished Alumni Professional Achievement Award (2020). Other notable recognitions include CHP Champion by the U.S. Combined Heat and Power Association (2003), Energy Professional of the Year by the New York Chapter of Association of Energy Engineers (2007), Rensselaer Polytechnic Institute Trustee “Faculty Achievement” recognition (2007), Applied Materials President’s Quality Award (2011) and the Best Patents of Applied Materials award (2018). Dr. Patibandla currently serves a four-year term as a Member of Emerging Technology Technical Advisory Committee, U.S. Dept of Commerce (2020-24), and had previously served on numerous U.S. Dept. of Energy Committees and various U.S. National Laboratory External Review Panels.
A New µ-LED Display Architecture & High Volume Manufacturing Approach
Micro-LED-based front plane technology is touted as the nextgen display because of their high efficiency (low power consumption and higher brightness) and superior performance in lifetime, color gamut, resolution, refresh rate and operating temperature range compared to the currently dominant display technologies (LCD and OLED). Several key hurdles have hampered the speedy development and market adoption of micro-LED displays. They include availability of small size (<10 microns, preferably <5 microns) micro-LED dice at high photon extraction efficiency, difficulties with multiple mass transfers steps (micro-LEDs to backplane) at necessary precision and yield, need for extensive repair to improve pixel-yield, and the absence of HVM scalable tools and processes. Reducing die dimensions would lead to lower cost, which unfortunately lowers device efficiency and increases mass transfer costs. Applied’s proprietary micro-LED front plane technology incorporates several key innovations such as use of highest extraction efficiency dice of a single wavelength (vs. red/green/blue), maintains highest photon extraction efficiency at small die-size, fewest number of mass transfer steps with high yield, and development and use of HVM-scalable manufacturing tools. Applied’s manufacturing process incorporates an innovative pixel architecture that reduces the complexity of sub-pixel repair steps thus affording inherently higher yield, high resolution, high brightness displays.